European supercomputer Jupiter’s CPU Rhea1 will get a spec bump – and a delay


Tick tick tick: SiPearl is the French firm chosen by the European supercomputer consortium (EuroHPC JU) to develop a chip for the primary exascale-class supercomputer within the area. The group not too long ago launched up to date specs for the Rhea1 microchip, indicating that the primary samples will probably be accessible later than initially anticipated.

While attending the ISC commerce present in Hamburg, SiPearl shared the newest specs and primary options of the supercomputer chip Rhea1. This “first-generation” processor will make the most of the Arm Neoverse V1 platform, empowering the high-performance computing duties of Europe’s next-generation supercomputers whereas consuming much less power than competing merchandise.

Previously, Rhea1’s specs included 72 Neoverse V1 cores. However, SiPearl now signifies that the chip will characteristic a complete of 80 Arm cores. The Rhea1 mission all the time meant to include 80 computing cores, the corporate clarified, with every core containing two 256-bit scalable vector extensions for “quick vector computations” in HPC eventualities.

The up to date design consists of built-in, high-bandwidth reminiscence chips with 4 completely different HBM stacks per chip. Many HPC duties, particularly AI inferencing, will tremendously profit from built-in RAM. SiPearl is collaborating with Samsung to make the most of HBM2e reminiscence chips, though the Korean producer will quickly introduce the brand new HBM4 normal.

In addition to HBM, Rhea1 chips may even characteristic 4 DDR5 interfaces supporting two extra DIMM modules per channel. The design accommodates a complete of 104 PCIe Gen5 lanes, with configurations of as much as six x16 lanes plus two x4 lanes. The Neoverse know-how additionally incorporates a particular Network-on-Chip part, the CMN-700 Coherent Mesh NoC, to facilitate speedy information sharing between compute and I/O parts.

Rhea1 is already supported by a variety of compilers, libraries, and instruments. It is able to powering each “conventional” HPC workloads and newer AI inference duties. According to the French firm, the chip’s “beneficiant” reminiscence capability would be the key factor in delivering elevated efficiency ranges whereas retaining the energy-efficiency options of the Arm structure, leading to an unprecedented byte-per-FLOP ratio.

What SiPearl failed to emphasise, nonetheless, is that the Rhea mission was initially meant to supply the very first chips by 2022. The silicon firm beforehand introduced that the chips can be manufactured by TSMC in 2023 however is suspending Rhea1’s debut to 2025. Installation of Jupiter, Europe’s first exascale supercomputer designed round Rhea’s chip structure, is predicted to begin this yr.



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